Apple has made use of numerous unique processors, predominantly ARM-based, in their products.
Apple silicon is a brand name for Apple's in-house ARM-based system-on-a-chip (SoC) designs. A typical SoC in an Apple product will include general-purpose application processors, including the CPU and GPU, unified random access memory shared between the two, and various purpose-specific coprocessors, such as the Secure Enclave Processor. The SoC bears a unique identifier, named the Exclusive Chip ID (ECID), and a "burned", read-only bootrom, the first code executed when the device turns on.
History[edit source]
Apple's use of ARM technology begins shortly after the inception of ARM itself, when Acorn Computers, Apple, and VLSI Technology formed the ARM Ltd. joint venture on 27 November 1990. Apple's motive to invest in ARM was to enable them to develop a processor that could power the Newton, Apple's first low-power portable device. Apple cancelled the Newton project after Steve Jobs's 1997 return to the company. ARM Ltd. continued operations, and Apple investigated other use cases for ARM-based product designs. This led to the inception of the iPad as a successor to Newton, the iPhone as a spin-off of the iPad concept, and the iPod, which was simpler than either concept to bring to market.
On 23 October 2001, Apple announced the iPod, a portable music player device making use of PortalPlayer ARM SoCs. The iPod is credited as being a key part of Apple's return to profitability, selling 100 million units in six years.
On 9 January 2007, Apple announced the iPhone, the first product to make use of Samsung Electronics S5L-series ARM processors.
On 23 April 2008, recognising the demand for the first iPhone to do more than any SoC on the market was capable of, Apple acquired the Santa Clara-based semiconductor design company P.A. Semi for $278 million. P.A. Semi already had history working with the ARM platform, having developed the early DEC StrongARM processor used by the Newton MessagePad 2000 series, among other RISC designs.
On 10 September 2012, Apple announced the iPhone 5. While still manufactured by Samsung, the CPU core is the first to be designed by Apple's in-house team.
On 9 September 2014, Apple announced the iPhone 6. Its A8 SoC was the first to use an SoC design manufactured by TSMC.
On 12 September 2017, Apple announced the iPhone X and iPhone 8. Its A11 Bionic SoC was the first to use an in-house designed GPU, rather than a licensed Imagination Technologies PowerVR design. The A11 series additionally introduced the Apple Neural Engine, an AI accelerator coprocessor.
On 22 June 2020, Apple announced plans to transition its Mac product line from Intel processors to its in-house designed Apple M-series processors.
List of ARM SoCs[edit source]
Early ARM Processors[edit source]
The Newton project saw Apple's earliest use of ARM processors. These are just the processor alone, not a system-on-a-chip.
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| ARM610 | ARM710A | StrongARM SA-110 | |
| Architecture | ARMv3 | ARMv4 | |
| Clock speed | 20 MHz | 25 MHz | 162 MHz |
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PortalPlayer 50xx[edit source]
PortalPlayer SoCs were used in early iPods. This list additionally includes the SigmaTel STMP 3550, an unrelated SoC used in the same timeframe.
| PP5002 | PP5020 | PP5021C | PP5022 | STMP 3550 | |
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| Architecture | ARMv4T | DSP56000 | |||
| Clock speed | 90 MHz | 75 MHz | 90 MHz | 80 MHz | 75 MHz |
| Core design | ARM7TDMI x 2 | ARM7 x 2 | ARM7 x 2 | ARM7 x 2 | DSP56004-based |
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Samsung S5L84xx and S5L87xx[edit source]
In 2007, Apple switched the iPod product line from the PortalPlayer PP50xx series to S5L87xx SoCs, designed in cooperation with Samsung. The iPod touch (2nd generation) also makes use of the S5L8720 SoC.
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| S5L8701 | S5L8702 | S5L8720 | S5L8730 | S5L8442 | S5L8723 | S5L8443 | S5L8740 | S5L8747 | |
| Architecture | ARMv4T | ARMv6 | ? | ARMv6 | ? | ARMv6 | |||
| Process | ? | ? | 65 nm | ? | ? | ? | ? | ? | ? |
| Clock speed | ? | ? | 533 MHz | ? | ? | ? | ? | ? | ? |
| Core design | ARM940T | ARM926EJ-S | ARM1176JZF-S | ARM1176JZF-S | ? | ARM11 | ? | ARM11 | ARM11 |
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Samsung S5L89xx[edit source]
The Samsung S5L89xx series was designed and manufactured by Samsung for use by Apple. While Apple began branding the chips as "A"-series starting with A4, they continued to use generic ARM cores until A6, when the Apple-designed Swift ARMv7 core was used.
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| S5L8900 | S5L8920 | S5L8922 | S5L8930 (A4) | S5L8940 (A5) | S5L8942 (A5) | S5L8947 (A5) | S5L8945 (A5X) | S5L8950 (A6) | S5L8955 (A6X) | S5L8960 (A7) | S5L8965 (A7) | |
| Architecture | ARMv6 | ARMv7-A | ARMv7-A "Swift" | ARMv8.0-A | ||||||||
| Process | 90 nm | 65 nm | 45 nm | 32 nm | 45 nm | 32 nm | 28 nm | |||||
| Core design | ARM11 | Cortex-A8 | Cortex-A9 | Cortex-A9 x 2 | Cortex-A9 | Cortex-A9 x 2 | Swift x 2 | Cyclone x 2 | ||||
| Clock speed | 412 MHz | 600 MHz | 1.0 GHz | 1.3 GHz | 1.4 GHz | 1.3 GHz | 1.4 GHz | |||||
| GPU design | PowerVR MBX Lite | PowerVR SGX535 | PowerVR SGX543 | PowerVR SGX543 x 2 | PowerVR SGX554 x 4 | PowerVR SGX543 x 3 | PowerVR SGX543 x 4 | PowerVR G6430 x 4 | ||||
| GPU clock speed | 103 MHz | 200 MHz | 250 MHz | 200 MHz | 266 MHz | 300 MHz | 450 MHz | |||||
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A-Series Chips[edit source]
Starting with A8, Apple began switching from Samsung to TSMC as their chip fabrication partner. A9 was dual-sourced from both Samsung and TSMC. Apple has continued to work closely with TSMC to take advantage of their latest process node improvements.
Starting with A10 Fusion, Apple introduced the big.LITTLE architecture, referring to the big cores as "Performance" (P) and little cores as "Efficiency" (E). Performance cores provide the maximum processing power of the device, while efficiency cores optimise for lower power operation. The operating system dynamically manages scheduling tasks on either kind of core as it sees fit to complete an operation, balancing performance against battery life. Enabling "Low Power Mode" on the device disables work from being scheduled on performance cores. Notably, A10 Fusion has a limitation that only the performance or efficiency cores can be active at a time - not both. This was resolved in A11 Bionic, which can activate both kinds of cores simultaneously. A10 Fusion additionally can only execute 32-bit code on performance cores, while A11 Bionic lacks support for executing 32-bit code, as this compatibility was removed in iOS 11.
Starting with A11 Bionic, Apple introduced the Apple Neural Engine, a set of coprocessor cores that optimise the machine learning tasks increasingly being taken advantage of by operating system features. Apple additionally introduced their own GPU core designs for the first time, replacing the PowerVR designs used to this point.
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| T7000 (A8) | T7001 (A8X) | S8000 (A9 Samsung) | S8003 (A9 TSMC) | S8001 (A9X) | T8010 (A10) | T8011 (A10X) | T8015 (A11) | T8020 (A12) | T8027 (A12X) | T8027 (A12Z) | T8030 (A13) | T8101 (A14) | T8110 (A15) | T8120 (A16) | |
| Architecture | ARMv8.0-A | ARMv8.1-A | ARMv8.2-A | ARMv8.3-A | ARMv8.4-A | ARMv8.5-A | ARMv8.6-A | ||||||||
| Process | 20 nm | 14 nm | 16 nm | 10 nm | 7 nm (TSMC N7) | 7 nm (TSMC N7P) | 5 nm (TSMC N5) | 5 nm (TSMC N5P) | 5 nm (TSMC N4P) | ||||||
| Big core design | Typhoon x 2 | Typhoon x 3 | Twister x 2 | Hurricane x 2 | Hurricane x 3 | Monsoon x 2 | Vortex x 2 | Vortex x 4 | Lightning x 2 | Firestorm x 2 | Avalanche x 2 | Everest x 2 | |||
| Big core speed | 1.5 GHz | 1.85 GHz | 2.26 GHz | 2.34 GHz | 2.38 GHz | 2.39 GHz | 2.49 GHz | 2.65 GHz | 3.00 GHz | 3.24 GHz | 3.46 GHz | ||||
| Little core design | — | Zephyr x 2 | Zephyr x 3 | Mistral x 4 | Tempest x 4 | Thunder x 4 | Icestorm x 4 | Blizzard x 4 | Sawtooth x 4 | ||||||
| Little core speed | — | 1.09 GHz | 1.30 GHz | 1.19 GHz | 1.59 GHz | 1.72 GHz | 1.82 GHz | 2.02 GHz | |||||||
| GPU design | PowerVR GX6450 x 4 | PowerVR GX6850 x 8 | PowerVR GT7600 x 6 | PowerVR GT7850 x 12 | PowerVR GT7600 Plus x 6 | PowerVR GT7600 Plus x 12 | Apple G? | Apple G11P x 4 | Apple G11G x 7 | Apple G11G x 8 | Apple G? x 4 | Apple G? x 4 | Apple G? x 5 | Apple G? x 5 | |
| GPU clock speed | 533 MHz | 450 MHz | 650 MHz | 900 MHz | 1.00 GHz | 1.06 GHz | 1.12 GHz | 1.23 GHz | 1.27 GHz | 1.33 GHz | 1.39 GHz | ||||
| Neural Engine cores | — | 2 | 8 | 16 | |||||||||||
| Memory[note 1] | LPDDR3-1600 | LPDDR4-3200 | LPDDR4X-4266 | LPDDR5-6400 | |||||||||||
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M-Series Chips[edit source]
Macs and iPad Pros with Apple silicon use a chip from the M-series. Major chip designs (which tend to receive a marketing name) are made available in various configurations, which are listed together below. These configurations are presumably the result of binning chips based on the yield of working cores.
M1 Series[edit source]
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| T8103 (M1) | T6000 (M1 Pro) | T6001 (M1 Max) | T6002 (M1 Ultra) | |
| Architecture | ARMv8.5-A | |||
| Process | TSMC N5 | |||
| Big core design | Firestorm x 4 | Firestorm x 6 or 8 | Firestorm x 16 | |
| Big core speed | 3.204 GHz | 2.228 GHz | ||
| Little core design | Icestorm x 4 | Icestorm x 2 | Icestorm x 4 | |
| Little core speed | 2.064 GHz | |||
| GPU design | Apple G? x 7 or 8 | Apple G? x 14 or 16 | Apple G? x 24 or 32 | Apple G? x 48 or 64 |
| GPU clock speed | 1.27 GHz | 1.29 GHz | ||
| Neural Engine cores | 16 | 32 | ||
| Memory[note 1] | LPDDR4X-4266 (2133 MHz) | LPDDR4X-6400 (3200 MHz) | ||
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M2 Series[edit source]
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| T8112 (M2) | T6020 (M2 Pro) | T6021 (M2 Max) | ||
| Architecture | ARMv8.5-A | |||
| Process | TSMC N5P | |||
| Big core design | Avalanche x 4 | Avalanche x 6 or 8 | Avalanche x 8 | |
| Big core speed | 3.504 GHz | 3.667 GHz | ||
| Little core design | Blizzard x 4 | |||
| Little core speed | 2.424 GHz | |||
| GPU design | Apple G? x 8 or 10 | Apple G? x 16 or 19 | Apple G? x 30 or 38 | |
| GPU clock speed | 1.39 GHz | |||
| Neural Engine cores | 16 | |||
| Memory[note 1] | LPDDR5-6400 | |||
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S and T-Series Chips[edit source]
Apple introduced the S series to provide an highly integrated, low-power system-in-a-package (SiP) for the Apple Watch. These chips have also found use in the iBridge (Mac coprocessor) and HomePod series. The T-series was merged to become integrated in the M-series SoCs.
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| S7002 (S1) | T8002 (S1P, S2, T1) | T8004 (S3) | T8012 (T2) | T8006 (S4, S5) | T8301 (S6, S7, S8) | |||||||
| Architecture | ARMv7k | ARMv8-A (arm64_32) | ||||||||||
| Process | 28 nm | ? | 16 nm | 7 nm (TSMC N7) | 7 nm (TSMC N7P) | |||||||
| Core design | Cortex-A7 | Cortex-A7 x 2 | Hurricane x 2 Zephyr x 2 Cortex-A7 |
Tempest x 2 | Thunder x 2 | |||||||
| Clock speed | 520 MHz | ? | ? | ? | 1.59 GHz | 1.8 GHz | ||||||
| GPU design | PowerVR Series5 | PowerVR Series6 | ? | ? x 3 | Apple G11M | ? | ||||||
| Memory[note 1] | LPDDR3 | LPDDR4 | ? | ? | ? | ? | ? | |||||
| Baseband | — | Qualcomm Snapdragon X7 LTE (MDM9635M) | — | Intel PMB9955 | ||||||||
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W and H-Series[edit source]
The W-series, later renamed to H-series, features in Apple's wireless headphone products. W-series chips following the W1 are integrated as part of the S-series SiPs.
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| W1 | W2 | W3 | H1 | H2 | ||
| Bluetooth | 4.2 | 5.0, later 5.3 | 5.0 | 5.3 | ||
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Assorted coprocessors[edit source]
From time to time, purpose-built embedded silicon has been produced for Apple.
Motion coprocessors in the M-series were briefly part of this family. With the A9, the coprocessor became integrated in the main system-on-a-chip.
The U-series coprocessors provide ultra-wideband functionality.
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| LPC18A1 (M7) | LPC18B1 (M8) | U1 | |
| Purpose | Motion coprocessor | Ultra-wideband controller | |
| Architecture | ARMv7-M | ARMv7E-M | |
| Process | ? | 16 nm | |
| Core design | Cortex-M3 | Cortex-M4 | |
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Other[edit source]
See Also[edit source]
References[edit source]
Notes[edit source]
- ^ a b c d Double data rate (DDR) memory speeds are measured in megatransfers per second (MT/s). To determine the clock speed in MHz, halve the number indicated. For instance, LPDDR4X-4266 is 2133 MHz.
The Apple Wiki would like to thank Henriok, who produced the majority of Apple SoC renders used in this article, releasing them into the public domain.
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